FPGA代码修改
module top_mdyDds(clk ,
rst_n ,
dac_mode,
dac_clka,
dac_da ,
dac_wra ,
dac_sleep
);
input clk ;
input rst_n ;
output dac_mode;
output dac_clka;
output [ 8-1:0] dac_da ;
output dac_wra ;
output dac_sleep ;
wire ctrl_dout ;
wire [ 7:0] wave_dout ;
wire wave_dout_vld ;
wire if_din_rdy ;
dds_ctrl u_dds_ctrl(
.clk (clk ),
.rst_n (rst_n ),
.cfg_en (1 ),
.cfg_time (50_000 ),
.cfg_repeat0 (3 ),
.cfg_repeat1 (3 ),
.cfg_repeat2 (3 ),
.cfg_add0 (25600 ),
.cfg_add1 (25600 ),
.cfg_add2 (25600),
.dout (ctrl_dout )
);
dds_wave u_dds_wave(
.clk (clk ),
.rst_n (rst_n ),
.din_add (ctrl_dout ),
.din_vld (1 ),
.cfg_mode(0 ),
.dout (wave_dout ),
.dout_vld(wave_dout_vld),
.dout_rdy(if_din_rdy )
);
mdyAd9709If u_mdyAd9709If(
.clk (clk ),
.rst_n (rst_n ),
.din (wave_dout ),
.din_vld(wave_dout_vld),
.din_rdy(if_din_rdy ),
.dac_mode (dac_mode ),
.dac_clka (dac_clka ),
.dac_da (dac_da ),
.dac_wra(dac_wra ),
.dac_sleep(dac_sleep )
);
endmodule
.cfg_add0 (25600 ),
.cfg_add1 (25600 ),
.cfg_add2 (25600),
这里面的128换成25600可以输出19.6Mhz的正弦波么?128产生98khz，放大200倍，这样子🆗么？
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